Synchronous rectifiers are used to perform DC-DC conversion in order to drive an output load, where a transformer is often used to construct a flyback converter with a secondary side switch to provide efficiency advantages over passive rectified flyback converters. In many applications, efficiency is a primary design goal, and it is desirable to reduce or mitigate switching losses as well as conduction losses in the primary and secondary side switches. Soft switching or zero voltage switching (ZVS) involves turning the primary and/or secondary side switches on when the voltage across the switch is low (preferably zero). Ideally, switching at zero volts minimizes switching loss, but this is difficult due to drain-source capacitance of field effect transistor (FET) type switches. Conduction loss occurs while the switch is turned on, and can be reduced by using larger switches, thereby reducing the on-state resistance (e.g., drain-source resistance RDSON for FET switches). However, larger transistor dimensions leads to increase in the switch capacitance, and thus simply increasing transistor size to mitigate conduction losses increases the switching losses, absent soft switching control. Furthermore, the ability to perform simple soft switching on the primary side switch of a synchronously rectified flyback converter is difficult over a wide range of input voltage and output voltage/current conditions. Certain conventional transition mode (TM) synchronous rectifier control schemes use valley control to regulate a converter output current or voltage, and the primary side switch is turned on at a local minima or “trough” of the resonant voltage ring at the primary side switching node. However, the resonant voltage oscillations do not approach zero volts even at the troughs, particularly for high input voltage conditions. Thus, true zero voltage switching cannot be achieved across a wide range of operating conditions for conventional synchronously rectified flyback converters, and switching losses can be substantial. At certain operating conditions, therefore, discontinuous mode (DM) switching operation must be used, which increases conduction losses and therefore reduces the converter efficiency. Moreover, hard switching (i.e., the inability to reliably achieve true zero voltage switching) inhibits the ability to increase switch size for combating conduction losses, and leads to increased common mode electromagnetic interference (EMI). Hard turn on of the primary side switch can also cause resonant doubling of the voltage on the secondary side rectifier, leading to increased synchronous rectifier blocking voltage as well as further increase to conduction losses caused by higher RDSON. Improved synchronous rectifier flyback converters and control techniques are therefore desirable to mitigate capacitive switching losses to support increased power density and switching frequency without degraded efficiency.